add experimental RISC-V support (#97)

This commit is contained in:
Mason Rowe
2026-10-31 01:41:45 -04:00
parent 96f102f8d0
commit 21f62408ec
3 changed files with 54 additions and 20 deletions

View File

@@ -33,7 +33,7 @@ issue if the binaries are out of date and lacking any security-related and/or
performance updates - the daily scheduled workflows should pick up new upstream
releases automatically.
Note: ARM and RISC-V compatibility is considered experimental.
Note: RISC-V compatibility is considered experimental.
### Compile Notes (manual builds)